I 天数智芯 国产 Last verified

天数智芯 天垓 100

PCIE 在售 发布于 2023 iluvatar-gen2
BF16
TFLOP/s
95 厂商声称
FP8
TFLOP/s
不支持
FP4
TFLOP/s
不支持
Memory
GB
32 厂商声称
Mem BW
GB/s
1200 厂商声称
TDP
W
300 厂商声称

完整规格

算力

FP4 TFLOPS
不支持
FP8 TFLOPS
不支持
BF16 TFLOPS
95
FP16 TFLOPS
95
INT8 TOPS
190

显存

容量
32 GB
带宽
1200 GB/s
类型
HBM2e

芯片架构 🟢 vendor floorplan

SM count
32
HBM stacks
2
制程
7 nm
PCIe
Gen 4 ×16

Scale-Up (节点内)

协议
PCIe-Gen4
单链带宽
64 GB/s
World size
8
拓扑
pcie-fabric
交换机

Scale-Out (节点间)

单卡出口
100 Gbps
协议
RoCEv2
NIC

拓扑示意

拓扑结构 · Topology
8 卡 scale-up domain
芯片内部 / Die-level architecture
HBM HBM 天数智芯 天垓 100 L2 / shared cache · NoC L1$ / register file (per SM) 32 SMs · darker block = tensor / matrix engine 95 TFLOPS BF16 · 32 GB HBM2e @ 1.2 TB/s · 300 W TDP

🟢 vendor floorplan 32 SMs · 2× HBM · 7 nm


集群拓扑 / Cluster topology · PCIe-Gen4 @ 64 GB/s
PCIe-Gen4 switch 64 GB/s/link · all-to-all GPU 0 32GB GPU 1 32GB GPU 2 32GB GPU 3 32GB GPU 4 32GB GPU 5 32GB GPU 6 32GB GPU 7 32GB 8 cards · pcie-fabric topology · scale-out: 100 Gbps/card
Scale-Up · 域内
PCIe-Gen4
64 GB/s · 拓扑: pcie-fabric
world_size = 8
Scale-Out · 跨域
RoCEv2
100 Gbps/卡 NIC

能跑哪些模型?

Quick estimates · decode tok/s/card 上界

TP=8 · FP16 · batch=16 · prefill=1024 · decode=256 · 已应用 efficiency 校准

在计算器中调整 →
模型 参数 (active) Decode tok/s/card 瓶颈
DeepSeek V4 Pro
deepseek
49B 显存不足
DeepSeek V4 Flash
deepseek
13B 显存不足
Mistral Small 4
mistral
22B 显存不足
GLM-5 Reasoning
zhipu
32B 28 内存带宽
GLM-5.1
zhipu
32B 显存不足
Qwen3.6 Plus
alibaba
35B 显存不足
Kimi K2.6
moonshot
32B 显存不足
MiniMax M2.7
minimax
46B 显存不足

算子级 fit · 任意模型瓶颈类型 + 上界

算子级 fit · operator-level fit (per-token roofline)

基于每个模型 operator_decomposition + 本卡 BF16 95 TFLOPS / 1,200 GB/s 计算 · ridge point ≈ 79 FLOPs/byte

上界 = min(计算屋顶, 内存带宽屋顶) · efficiency 未应用
模型 domain 主导算子 AI · F/B 瓶颈 tok/s 上界
DeepSeek V4 Pro llm matmul 245.5 🔥 计算 16k
GraphCast scientific graph-message-passing 0.9 💾 内存带宽 2214
AlphaFold 3 scientific pair-bias-attention 2.3 💾 内存带宽 665
GPT-OSS llm matmul 0.7 💾 内存带宽 97
Gemma 4 26B llm matmul 0.7 💾 内存带宽 72
DeepSeek V4 Flash llm matmul 0.8 💾 内存带宽 68
Mistral Small 4 llm matmul 0.6 💾 内存带宽 31
Llama 4 Maverick llm matmul 0.8 💾 内存带宽 31
需要 efficiency 校准 + concurrency 扫描 + TCO 估算 → 在计算器中评估 →

算子支持 & 优化空间

算子支持 & 优化空间 / Operator support & headroom

Per-operator support derived from software_support.engines + scale-up topology. Optimization headroom from measured efficiency factor.

Optimization headroom
+-9 pp
saturated

Near saturation at 109% of roofline. Further gains require workload restructure (disaggregated, speculative, smaller batch).

Communication (collective)
All-to-All 🟢 mature
all-to-all via PCIe-Gen4 world_size=8
AllReduce 🟢 mature
PCIe-Gen4 ring all-reduce
Attention
Multi-Head Attention 🟡 partial
no production attention engine
FlashAttention-3 🔴 gap
No FA-3 path; falls back to FA-2 / vanilla SDPA
Matrix multiply (GEMM)
Matrix Multiplication 🟢 mature
GEMM supported on all inference engines
MoE routing
MoE Routing 🔴 gap
no MoE-aware engine
Normalization
RMSNorm 🟢 mature
fused into engine kernels
Embedding
fused into engine kernels
Activation
SiLU / Swish 🟢 mature
fused into engine kernels
Softmax 🟢 mature
fused into engine kernels

软件栈支持

引擎 状态 BF16FP16FP4FP8 E4M3FP8 E5M2INT4 AWQ
HanGuangAI 未确认
LMDeploy 未确认
MindIE 未确认
MoRI 未确认
SGLang 未确认
TensorRT-LLM (Dynamo) 未确认
vLLM 未确认
实测校准 efficiency factor

基于 1 个该硬件的实测案例计算得出, 计算器使用此值替代默认 0.5。

1.09
measured / theoretical (n=1)

已有部署案例 (1)

引证

  1. [1] Iluvatar CoreX 天垓 100 product overview — https://www.iluvatar.com/ · 访问于 2026-04-28 厂商声称
  2. [2] BI (天垓100): CUDA-compatible CoreX architecture, ~32 SMs, 2× HBM2e ⇒ 32 GB; TSMC 7nm-class — https://www.iluvatar.com/ · 访问于 2026-04-28 社区估算
⚠ All performance figures are vendor-claimed unless tier=measured.
⚠ Public spec sheets limited.