海光 DCU Z100
PCIE 在售 发布于 2022 hygon-dcu-gen2
BF16
TFLOP/s
96 厂商声称
FP8
TFLOP/s
不支持
FP4
TFLOP/s
不支持
Memory
GB
64 厂商声称
Mem BW
GB/s
1024 厂商声称
TDP
W
350 厂商声称
完整规格
算力
FP4 TFLOPS
不支持
FP8 TFLOPS
不支持
BF16 TFLOPS
96
FP16 TFLOPS
96
INT8 TOPS
192
显存
容量
64 GB
带宽
1024 GB/s
类型
HBM2e
芯片架构 🟢 vendor floorplan
CU count
64
HBM stacks
4
制程
7 nm
PCIe
Gen 4 ×16
Scale-Up (节点内)
协议
PCIe-Gen4
单链带宽
64 GB/s
World size
8
拓扑
pcie-fabric
交换机
—
Scale-Out (节点间)
单卡出口
100 Gbps
协议
RoCEv2
NIC
—
拓扑示意
拓扑结构 · Topology
8 卡 scale-up domain
芯片内部 / Die-level architecture
🟢 vendor floorplan 64 CUs · 4× HBM · 7 nm
集群拓扑 / Cluster topology · PCIe-Gen4 @ 64 GB/s
Scale-Up · 域内
PCIe-Gen4
64 GB/s · 拓扑: pcie-fabric
world_size = 8
Scale-Out · 跨域
RoCEv2
100 Gbps/卡 NIC
能跑哪些模型?
Quick estimates · decode tok/s/card 上界
TP=8 · FP16 · batch=16 · prefill=1024 · decode=256 · 已应用 efficiency 校准
| 模型 | 参数 (active) | Decode tok/s/card | 瓶颈 |
|---|---|---|---|
| DeepSeek V4 Pro deepseek | 49B | — | 显存不足 |
| DeepSeek V4 Flash deepseek | 13B | — | 显存不足 |
| Mistral Small 4 mistral | 22B | 13 | 内存带宽 |
| GLM-5 Reasoning zhipu | 32B | 11 | 内存带宽 |
| GLM-5.1 zhipu | 32B | — | 显存不足 |
| Qwen3.6 Plus alibaba | 35B | — | 显存不足 |
| Kimi K2.6 moonshot | 32B | — | 显存不足 |
| MiniMax M2.7 minimax | 46B | — | 显存不足 |
算子级 fit · 任意模型瓶颈类型 + 上界
算子级 fit · operator-level fit (per-token roofline)
基于每个模型 operator_decomposition + 本卡 BF16 96 TFLOPS / 1,024 GB/s 计算 · ridge point ≈ 94 FLOPs/byte
| 模型 | domain | 主导算子 | AI · F/B | 瓶颈 | tok/s 上界 |
|---|---|---|---|---|---|
| DeepSeek V4 Pro | llm | matmul | 245.5 | 🔥 计算 | 16k |
| GraphCast | scientific | graph-message-passing | 0.9 | 💾 内存带宽 | 1889 |
| AlphaFold 3 | scientific | pair-bias-attention | 2.3 | 💾 内存带宽 | 568 |
| GPT-OSS | llm | matmul | 0.7 | 💾 内存带宽 | 83 |
| Gemma 4 26B | llm | matmul | 0.7 | 💾 内存带宽 | 62 |
| DeepSeek V4 Flash | llm | matmul | 0.8 | 💾 内存带宽 | 58 |
| Mistral Small 4 | llm | matmul | 0.6 | 💾 内存带宽 | 27 |
| Llama 4 Maverick | llm | matmul | 0.8 | 💾 内存带宽 | 26 |
需要 efficiency 校准 + concurrency 扫描 + TCO 估算 → 在计算器中评估 →
算子支持 & 优化空间
算子支持 & 优化空间 / Operator support & headroom
Per-operator support derived from software_support.engines + scale-up topology. Optimization headroom from measured efficiency factor.
Optimization headroom
+50 pp
moderate
No cases yet — using default 0.5 efficiency. Real headroom unknown until first measurement lands.
Communication (collective)
All-to-All 🟢 mature
all-to-all via PCIe-Gen4 world_size=8
AllReduce 🟢 mature
PCIe-Gen4 ring all-reduce
Attention
Multi-Head Attention 🟢 mature
paged-attention via vLLM/SGLang/MindIE
FlashAttention-3 🔴 gap
No FA-3 path; falls back to FA-2 / vanilla SDPA
Matrix multiply (GEMM)
Matrix Multiplication 🟢 mature
GEMM supported on all inference engines
MoE routing
MoE Routing 🟢 mature
MoE gating supported via vLLM ≥0.4 / SGLang
Normalization
RMSNorm 🟢 mature
fused into engine kernels
Embedding
Rotary Position Embedding 🟢 mature
fused into engine kernels
Activation
SiLU / Swish 🟢 mature
fused into engine kernels
Softmax 🟢 mature
fused into engine kernels
最接近的替代卡 (按规格相似度)
基于 BF16 算力 / 显存 / 显存带宽 / FP8 加权欧氏距离。供选型决策参考。
软件栈支持
| 引擎 | 状态 | BF16 | FP16 | FP4 | FP8 E4M3 | FP8 E5M2 | INT4 AWQ |
|---|---|---|---|---|---|---|---|
| HanGuangAI | 未确认 | — | — | — | — | — | — |
| LMDeploy | 未确认 | — | — | — | — | — | — |
| MindIE | 未确认 | — | — | — | — | — | — |
| MoRI | 未确认 | — | — | — | — | — | — |
| SGLang | 未确认 | — | — | — | — | — | — |
| TensorRT-LLM (Dynamo) | 未确认 | — | — | — | — | — | — |
| vLLM | 社区 | — | ✓ | — | — | — | — |
已有部署案例 (0)
暂无该硬件的实测案例。
成为第一个贡献者?
引证
- [1] Hygon DCU product overview (limited detail public) — https://www.hygon.cn/ · 访问于 2026-04-28 厂商声称
- [2] Z100 (深算一号) is GCN-derived: 64 CUs, 4× HBM2e stacks ⇒ 64 GB; chiplet design at SMIC 7nm-class. Programmed via DTK / HIP (AMD ROCm fork). — https://www.hygon.cn/ · 访问于 2026-04-28 社区估算
⚠ All performance figures are vendor-claimed unless tier=measured.
⚠ Hygon DCU uses HIP, similar programming model to AMD ROCm.