SambaNova SN40L
RECONFIGURABLE 在售 发布于 2024 sambanova-rdu-gen4
BF16
TFLOP/s
638 厂商声称
FP8
TFLOP/s
1040 厂商声称
FP4
TFLOP/s
不支持
Memory
GB
1664 厂商声称
Mem BW
GB/s
6400 厂商声称
TDP
W
300 厂商声称
完整规格
算力
FP4 TFLOPS
不支持
FP8 TFLOPS
1040
BF16 TFLOPS
638
FP16 TFLOPS
638
INT8 TOPS
1040
显存
容量
1664 GB
带宽
6400 GB/s
类型
HBM3
芯片架构 🟢 vendor floorplan
RDU-Tile count
1040
制程
5 nm
Die area
800 mm²
PCIe
Gen 5 ×16
Scale-Up (节点内)
协议
SambaFabric
单链带宽
800 GB/s
World size
16
拓扑
switched
交换机
—
Scale-Out (节点间)
单卡出口
200 Gbps
协议
Ethernet
NIC
—
拓扑示意
拓扑结构 · Topology
16 卡 scale-up domain
芯片内部 / Die-level architecture
⚠ illustrative / 示意性版图: compute-unit and HBM-stack count are inferred from public BF16 / memory specs. architecture field not populated for this card yet. Contribute floorplan data →
🔄 reconfigurable dataflow (RDU)
集群拓扑 / Cluster topology · SambaFabric @ 800 GB/s
Scale-Up · 域内
SambaFabric
800 GB/s · 拓扑: switched
world_size = 16
Scale-Out · 跨域
Ethernet
200 Gbps/卡 NIC
能跑哪些模型?
Quick estimates · decode tok/s/card 上界
TP=8 · FP8 · batch=16 · prefill=1024 · decode=256 · 已应用 efficiency 校准
| 模型 | 参数 (active) | Decode tok/s/card | 瓶颈 |
|---|---|---|---|
| DeepSeek V4 Pro deepseek | 49B | 86,451 | 计算 |
| DeepSeek V4 Flash deepseek | 13B | 182 | 内存带宽 |
| Mistral Small 4 mistral | 22B | 83 | 内存带宽 |
| GLM-5 Reasoning zhipu | 32B | 69 | 内存带宽 |
| GLM-5.1 zhipu | 32B | 47 | 内存带宽 |
| Qwen3.6 Plus alibaba | 35B | 45 | 内存带宽 |
| Kimi K2.6 moonshot | 32B | 38 | 内存带宽 |
| MiniMax M2.7 minimax | 46B | 30 | 内存带宽 |
算子级 fit · 任意模型瓶颈类型 + 上界
算子级 fit · operator-level fit (per-token roofline)
基于每个模型 operator_decomposition + 本卡 BF16 638 TFLOPS / 6,400 GB/s 计算 · ridge point ≈ 100 FLOPs/byte
| 模型 | domain | 主导算子 | AI · F/B | 瓶颈 | tok/s 上界 |
|---|---|---|---|---|---|
| DeepSeek V4 Pro | llm | matmul | 245.5 | 🔥 计算 | 106k |
| GraphCast | scientific | graph-message-passing | 0.9 | 💾 内存带宽 | 12k |
| AlphaFold 3 | scientific | pair-bias-attention | 2.3 | 💾 内存带宽 | 3548 |
| GPT-OSS | llm | matmul | 0.7 | 💾 内存带宽 | 517 |
| Gemma 4 26B | llm | matmul | 0.7 | 💾 内存带宽 | 385 |
| DeepSeek V4 Flash | llm | matmul | 0.8 | 💾 内存带宽 | 364 |
| Mistral Small 4 | llm | matmul | 0.6 | 💾 内存带宽 | 166 |
| Llama 4 Maverick | llm | matmul | 0.8 | 💾 内存带宽 | 164 |
需要 efficiency 校准 + concurrency 扫描 + TCO 估算 → 在计算器中评估 →
算子支持 & 优化空间
算子支持 & 优化空间 / Operator support & headroom
Per-operator support derived from software_support.engines + scale-up topology. Optimization headroom from measured efficiency factor.
Optimization headroom
+50 pp
moderate
No cases yet — using default 0.5 efficiency. Real headroom unknown until first measurement lands.
Communication (collective)
All-to-All 🟢 mature
all-to-all via SambaFabric world_size=16
AllReduce 🟢 mature
SambaFabric ring all-reduce
Attention
Multi-Head Attention 🟢 mature
paged-attention via vLLM/SGLang/MindIE
FlashAttention-3 🟢 mature
FA-3 on modern engine + tensor cores
Matrix multiply (GEMM)
Matrix Multiplication 🟢 mature
GEMM supported on all inference engines
MoE routing
MoE Routing 🟢 mature
MoE gating supported via vLLM ≥0.4 / SGLang
Normalization
RMSNorm 🟢 mature
fused into engine kernels
Embedding
Rotary Position Embedding 🟢 mature
fused into engine kernels
Activation
SiLU / Swish 🟢 mature
fused into engine kernels
Softmax 🟢 mature
fused into engine kernels
最接近的替代卡 (按规格相似度)
基于 BF16 算力 / 显存 / 显存带宽 / FP8 加权欧氏距离。供选型决策参考。
软件栈支持
| 引擎 | 状态 | BF16 | FP16 | FP4 | FP8 E4M3 | FP8 E5M2 | INT4 AWQ |
|---|---|---|---|---|---|---|---|
| HanGuangAI | 未确认 | — | — | — | — | — | — |
| LMDeploy | 未确认 | — | — | — | — | — | — |
| MindIE | 未确认 | — | — | — | — | — | — |
| MoRI | 未确认 | — | — | — | — | — | — |
| SGLang | 未确认 | — | — | — | — | — | — |
| TensorRT-LLM (Dynamo) | 未确认 | — | — | — | — | — | — |
| vLLM | 社区 | ✓ | ✓ | — | ✓ | — | — |
已有部署案例 (0)
暂无该硬件的实测案例。
成为第一个贡献者?
引证
- [1] SambaNova SN40L (Cardinal): RDU (Reconfigurable Dataflow Unit) with 1040 PCUs, 64 MB on-chip SRAM, 1.5 TB HBM3 + DDR5 hybrid memory (1664 GB total), 5nm TSMC, 800 mm² die. Full system: 8-card SN40L node with 12 TB aggregate fast memory. — https://sambanova.ai/products/sn40l · 访问于 2026-04-29 厂商声称
⚠ SN40L unique architecture: 3-tier memory (on-chip SRAM + HBM + DDR5) lets it host 5+ trillion-parameter models in a single node — no other accelerator does this.
⚠ Compute reported is per-RDU; sustained throughput depends on dataflow graph fit (reconfigurable; not all models map cleanly).